Whitepaper / 白皮书
Bilingual static whitepaper page for product, technology, application, roadmap, and risk disclosure.
PhoX-M 是面向边缘端高性能计算与实时信号处理场景的光矩阵乘法协处理模组。核心采用 64 x 64 可调 MZI 干涉网格架构，目标在单次光传播中完成复数矩阵乘法，并通过电子域完成调度、非线性处理、误差补偿与系统控制。
PhoX-M is an optical matrix multiplication coprocessor module for real-time edge computing and signal processing. Its core uses a 64 x 64 tunable MZI interference mesh to perform complex matrix multiplication in the optical domain, while electronics handle scheduling, nonlinear processing, error compensation, and system control.
目标规格包括 1.6 TOPS 等效光学线性算力、光域延迟低于 500 ps、端到端延迟低于 1 us、8-bit 等效精度、4 x 25 Gbps 光 I/O、FMC+ 电接口和 75 x 60 x 15 mm 模组尺寸。上述参数为仿真或理论目标，待流片验证。
Target specifications include 1.6 TOPS equivalent optical linear compute, optical latency below 500 ps, end-to-end latency below 1 us, 8-bit equivalent precision, 4 x 25 Gbps optical I/O, FMC+ electrical interface, and a 75 x 60 x 15 mm module footprint. These figures are simulation-based or theoretical targets pending silicon validation.
系统分为应用层、软件栈、电域处理和光域处理。光域负责 y = W x 等线性矩阵运算，电域负责 ReLU、Sigmoid、数据调度、误差补偿和系统控制。软件栈包含编译器、运行时、驱动、SDK 与 EIC 固件。
The system is organized into application, software stack, electronic processing, and optical processing layers. The optical domain handles linear matrix operations such as y = W x, while the electronic domain handles nonlinear operators, data scheduling, error compensation, and system control. The software stack includes compiler, runtime, driver, SDK, and EIC firmware.
第一阶段聚焦 5G/6G 波束赋形、实时信号处理、雷达/通信预编码和边缘 AI 线性算子卸载。PhoX-M 作为专用协处理器，不替代通用 GPU，而是在低延迟、低功耗线性矩阵工作负载中提供差异化价值。
The first phase focuses on 5G/6G beamforming, real-time signal processing, radar and communication precoding, and edge AI linear-operator offload. PhoX-M is a dedicated coprocessor rather than a general GPU replacement, optimized for low-latency and low-power linear matrix workloads.
M1-M2 完成规格冻结与 GDSII；M3-M6 完成 MPW 流片与封装设计；M7-M9 完成点亮、校准、SDK alpha 和开发套件；M10-M12 推进首批客户 POC；M13-M18 完成 v2.0 方案详细设计与定义冻结。
M1-M2: specification freeze and GDSII. M3-M6: MPW tapeout and package design. M7-M9: bring-up, calibration, SDK alpha, and development kit. M10-M12: first customer POC. M13-M18: detailed v2.0 design and definition freeze.
白皮书中的性能、市场和融资信息基于当前规划、仿真、理论推算或公开资料，不代表最终量产指标。融资与 Web3 内容不构成投资建议，正式公开前需法务、税务和证券合规审核。
Performance, market, and financing information in this whitepaper is based on current planning, simulation, theoretical estimates, or public sources and does not represent final production specifications. Financing and Web3 content is not investment advice and requires legal, tax, and securities compliance review before formal publication.